Sensors are the key elements for capturing environmental properties and are increasingly important in the industry for the intelligent control of industrial processes. While in many everyday objects highly integrated sensor systems are already state of the art, the situation in an industrial environment is clearly different. Frequently, the use of sensor systems is impossible, because the extreme ambient conditions of industrial processes like high operating temperatures or strong mechanical load do not allow the reliable operation of sensitive electronic components. Fraunhofer is running the Lighthouse Project "eHarsh"to overcome this hurdle. In the course of the project, an integrated sensor readout electronic has been realized based on a set of three chips. A dedicated sensor frontend provides the analog sensor interface for resistive sensors typically arranged in a Wheatstone configuration. Furthermore, the chipset includes a 32-bit microcontroller for signal conditioning and sensor control. Finally, it comprises an interface chip including a bus transceiver and voltage regulators. The chipset has been realized in a high-temperature 0.35-micron SOI-CMOS technology focusing operating temperatures up to 300_C. The chipset is assembled on a multilayer ceramic low-temperature cofired ceramics (LTCC) board using flip chip technology. The ceramic board consists of four layers with a total thickness of approximately 0.9 mm. The internal wiring is based on silver paste while the external contacts were alternatively manufactured in silver (sintering/soldering) or in gold alloys (wire bonding). As an interconnection technology, silver sintering has been applied. It has already been shown that a significant increase in lifetime can be reached by using silver sintering for die attach applications. Using silver sintering for flip chip technology is a new and challenging approach. By adjusting the process parameter geared to the chipset design and the design of the ceramic board high-quality flip chip interconnects can be generated. © 2022 International Microelectronics Assembly and Packaging Society.

This paper presents an investigation of the responsivity of a time-delay integration (TDI) charge-coupled device that employs anti-blooming clocking and uses a varying number of TDI stages. The influence of charge blooming caused by unused TDI stages in a TDI deployed selection scheme is shown experimentally, and an anti-blooming clocking mechanism is analyzed. The impact of blooming on sensor characteristics, such as the responsivity, the conversion gain, and the signal-to-noise ratio, is investigated. A comparison of the measurements with and without this anti-blooming clocking mechanism is presented and discussed in detail. © 2022 by the authors.

Time correlated single photon counting is a statistical method to generate time-correlated histograms (TC-Hists), which are based on the time-of-flight information measured by photon detectors such as single-photon avalanche diodes. With restricted measurements per histogram and the presence of high background light, it is challenging to obtain the target distance in a TC-Hist. In order to improve the data processing robustness under these conditions, the concept of machine learning is applied to the TC-Hist. Using the neural network-based multi-peak analysis (NNMPA), introduced by us, including a physics-guided feature extraction and a distance prediction process, the analysis is focused on a small number of critical features in the TC-Hist. Based on these features, possible target distances with correlated certainty values are inferred. Furthermore, two optimization approaches regarding learning ability and real-time performance are discussed. In particular, variants of the NNMPA are evaluated on both synthetic and real datasets. The proposed method not only has higher robustness in allocating the coarse position ( ±5% ) of the target distance in harsh conditions, but also is faster than the classical digital processing with an average-filter and noise suppression. Thus, it can be applied to improve the system robustness, especially in the case of high background light and middle-range detections. © 2022 The Author(s). Published by IOP Publishing Ltd.

For retinal prostheses strategies to increase the stimulative cell selectivity are required to generate neural responses to electrical stimulation of retinal ganglion cells (RGCs) that match the response of the natural signal pathway. An important part of these strategies is the modulation of stimulus amplitude and frequency in the kilohertz range. The aim of this research is to investigate the electronic challenges and requirements of new electrical stimulation strategies for future retinal implants. This paper presents a 42 channel current controlled stimulator which is able to stimulate retinal tissue with sinusoidal frequencies higher than 1 kHz at amplitudes of up to 200 µ A. The power efficiency of the stimulator is 87.3% at a supply voltage of 1.8 V. One stimulator requires a respective area of 0.0071 mm2 by using a 180 nm CMOS technology. © 2022 IEEE.

The aim of this research is to investigate low-power circuit concepts for the hardware implementation of an adaptively controlled stimulator for future retinal implants. For this specific application purpose, the circuit complexity must be low, while at the same time the functionality is extended. This paper presents the implementation of an analog spike detection circuit to detect spikes from extracellular recordings and to perform electrode individual firing-rate measurements in a spatially high-density electrode array, which has a reduced circuit complexity compared to the widely-used nonlinear energy operator (NEO) and allows stronger suppression of local oscillations following the retinal remodeling. The module is verified by emulating extracellular activities using the Hodgkin-Huxley model. This recording-unit is integrated into an eight-channel closed-loop-neurostimulator prototype. It dissipates 11.4 μW and requires an area of 0.066 mm2 by using a 350 nm CMOS process. IEEE

In applications of advanced driver assistance systems (ADAS), a single photon avalanche diode (SPAD)-based direct time-of-flight (d-TOF) LiDAR system is one of the promising range sensor systems. Many processing algorithms based on this LiDAR system have been developed. Therein, neural network-based multi-peak analysis (NNMPA) is a LiDAR histogram processing method, which improves the distance measurement robustness under harsh environment conditions, e.g. high ambient light or large distances. However, the portability of the NNMPA on embedded systems remains challenging and should be further implemented and evaluated. In this paper, the NNMPA is implemented on Enclustra Mars ZX3 FPGA board to enable a system-on-chip (SoC) test of the method. The presented implementation achieves a frame rate of 20 fps with 96 pixels. The accuracy drop-off of 1.23 % is observed compared to the floating-point arithmetic implementation on PC. © 2021 IEEE.

Background: Retinal degenerative diseases, e.g., retinitis pigmentosa, cause a severe decline of the visual function up to blindness. Treatment still remains difficult; however, implantation of retinal prostheses can help restoring vision. In this study, the biocompatibility and surgical feasibility of a newly developed epiretinal stimulator (OPTO-EPIRET) was investigated. The previously developed implant was extended by an integrated circuit-based optical capturing, which will enable the immediate conversion of the visual field into stimulation patterns to stimulate retinal ganglion cells. Results: The biocompatibility of the OPTO-EPIRET was investigated in vitro using the two different cell lines L-929 and R28. Direct and indirect contact were analyzed in terms of cell proliferation, cell viability, and gene expression. The surgical feasibility was initially tested by implanting the OPTO-EPIRET in cadaveric rabbit eyes. Afterwards, inactive devices were implanted in six rabbits for feasibility and biocompatibility testings in vivo. In follow-up controls (1–12 weeks post-surgery), the eyes were examined using fundoscopy and optical coherence tomography. After finalization, histological examination was performed to analyze the retinal structure. Regarding the in vitro biocompatibility, no significant influence on cell viability was detected (L929: < 1.3% dead cells; R-28: < 0.8% dead cells). The surgery, which comprised phacoemulsification, vitrectomy, and implantation of the OPTO-EPIRET through a 9–10 mm corneal incision, was successfully established. The implant was fixated with a retinal tack. Vitreal hemorrhage or retinal tearing occurred as main adverse effects. Transitional corneal edema caused difficulties in post-surgical imaging. Conclusions: The OPTO-EPIRET stimulator showed a good biocompatibility profile in vitro. Furthermore, the implantation surgery was shown to be feasible. However, further design optimization steps are necessary to avoid intra- and postoperative complications. Overall, the OPTO-EPIRET will allow for a wide visual field and good visual acuity due to a high density of electrodes in the central retina. © 2021, The Author(s).

Small sensor and actor nodes are often excluded from security mechanisms because of the lack of performance for cryptographic applications or the lack of a non-volatile memory to store the secret keys for such applications. Physical Unclonable Functions (PUFs) provide a good way for a secure key storage, but are also not necessarily lightweight in terms of area and power consumption. A PUF concept based on a capacitor array is described, which uses the a passive charge sharing technique and is able to accept a high number of challenges as input. By using pair building, an 8-stage array is able to derive up to 20160 bits of key material with an area use of $47\mathrm{F}^{2} /$bit in a 350nm CMOS technology. © 2020 IEEE.

The aim of this research is to investigate low-power circuit concepts for the hardware implementation of adaptive stimulation for future retinal implants. Especially for retinal implants, the circuit complexity must be low while increasing functionality. This paper presents the implementation of an analog spike detection circuit to perform electrode individual firing-rate measurements in a spatially high-density electrode array, which has a reduced circuit complexity compared to the wide-used nonlinear energy operator (NEO) and allows stronger suppression of local oscillations due to the retinal remodeling. This recording-unit is integrated in an eight-channel closed-loop-neurostimulator prototype. This recording unit dissipates 13.8 μW and requires an area of 0.066 mm2 by using a 350 nm CMOS process. © 2020 IEEE.

With the rise of advanced driver assistance systems (ADAS), range sensors and their data processing methods are becoming more and more important. Light detection and ranging (LiDAR) sensors are attracting attention due to their unique advantages in terms of radial distance resolution and detection range. However, the study of LiDAR data processing is usually divorced from the LiDAR sensor measurement process itself. This leads to critical measurement information being overlooked. This paper seeks a breakthrough to improve the performance of single-photon-avalanche-diode-based direct time-of-flight LiDAR systems by reviewing the data processing stages and corresponding processing approaches for LiDAR measurements, starting from photon incidence and ending with high-level feature recognition. Firstly, we propose a LiDAR system model based on data generation and transfer. The data forms in such a LiDAR system are mainly classified into timestamps, time-correlated histograms, point cloud data, and high-level properties. Subsequently, data processing methods applied to each of these data forms are analyzed. A number of hardware solutions closely related to data transmission and control are also included in the discussion. The principles, limitations, and challenges of these methods are discussed in detail and the criteria for evaluation of time-correlated histograms in ADAS are proposed. Finally, the research gaps in data processing are summarized, and future directions for research development are presented. CCBY

In this paper we present a 2× 192 pixel SPAD-based sensor for LiDAR applications fabricated in a 0.35 μm standard CMOS process. Distance measurement is performed using the direct time-of-flight technique. For time acquisition a DLL-based pixel-parallel TDC with 312.5 ps resolution and a 1.28μm range is integrated. Employing four single SPADs in each pixel enables background light suppression by detecting temporal correlated photons. Moreover, by using adjustable correlation parameters the dynamic range is increased significantly allowing a constant range at varying target reflectivity. © 2018 IEEE.

This article presents the design of an analog RF frontend for a 13.56 MHz transponder which can operate in a wide range of input powers. The frontend allows wireless telemetric data transmission and also powers the whole system. Implemented in a 0.35 μm CMOS technology the design includes the full-wave rectifier with voltage limiter, low dropout regulators with bandgap reference, a current-mode ASK demodulator supporting modulation indices from 10 to 40 %, clock recovery circuit, and a digital protocol engine. The modulator and demodulator allow the application in ISO 18003 Mode 1 compliant systems. The incident power can range from 460 μW up to 460mW and resistive loads up to 1 kΩ can be applied. The current consumption of the analog frontend itself is only 150 μA and it occupies an area of 0.85 mm2 in the chosen CMOS technology. © 2019 IEEE.

This article presents a new configurable wireless sensor system that can be used for biochemical and biomedical measurements, e.g. for monitoring the glucose level in blood. The sensor systems consists of an integrated nano-potentiostat which performs the actual measurements and an ISO 18000-3 compliant transponder module which allows wireless telemetric data transmission and also powers the whole sensor system. The two-chip sensor system was implemented in a 0.35 μm CMOS technology. The architecture and implementation details of both ASICs are presented in this article. A demonstrator system has been manufactured in combination with a chronoamperometric glucose sensor which allows the measurement of the glucose level in tear fluid. For a range of sensor currents from 0.1 μA to 10 μA the potentiostat achieved an accuracy of more than 5 % at a total power dissipation of less than 600 μW. With the realized antenna geometry a wireless communication distance of more than 7 cm has been achieved. © 2018 IEEE.

This article presents a new configurable wireless sensor system. The system is used to perform amperometric measurements and send the measurement data to a handheld reader using a wireless transponder interface. The two-chip sensor system was implemented in a 0.35 µm CMOS technology. The system consists of an integrated nano-potentiostat that performs the actual measurements and an ISO 18000-3 compliant frontend that enables wireless telemetric data transmission and powering of the entire sensor system. The system was manufactured in combination with a chronoamperometric glucose sensor which allows the measurement of the glucose content in tear fluid and thus a non-invasive determination of the blood sugar level. For a range of sensor currents from 0.1 µA to 10 µA, the potentiostat achieved an accuracy of better than 5 % with a total power dissipation of less than 600 µW. With the realized antenna geometry a wireless communication distance of more than 7 cm has been achieved. © 2019 by the authors. Licensee MDPI, Basel, Switzerland.

In this paper, we present a capacitive, MEMS-based accelerometer comprising an ultra-low noise CMOS integrated readout-IC and a high-precision bulk micro machined sensing element. The resulting accelerometer reaches an acceleration equivalent noise of only 200 ngsurd Hz, which makes it suitable for seismic measurement that require noise levels significantly below 1 μ g Hz. In addition, a high bandwidth of more than 5 kHz was achieved, which also makes the presented sensor system applicable for high-frequency measurements, e.g., in predictive maintenance applications for rotating machinery. The design of the sensing element and readout IC is presented in detail, and measurement results are shown which demonstrate the performance of the sensor system. © 2001-2012 IEEE.

Light detection and ranging (LiDAR) systems based on silicon single-photon avalanche diodes (SPAD) offer several advantages, like the fabrication of system-on-chips with a co-integrated detector and dedicated electronics, as well as low cost and high durability due to well-established CMOS technology. On the other hand, silicon-based detectors suffer from high background light in outdoor applications, like advanced driver assistance systems or autonomous driving, due to the limited wavelength range in the infrared spectrum. In this paper we present a novel method based on the adaptive adjustment of photon coincidence detection to suppress the background light and simultaneously improve the dynamic range. A major disadvantage of fixed parameter coincidence detection is the increased dynamic range of the resulting event rate, allowing good measurement performance only at a specific target reflectance. To overcome this limitation we have implemented adaptive photon coincidence detection. In this technique the parameters of the photon coincidence detection are adjusted to the actual measured background light intensity, giving a reduction of the event rate dynamic range and allowing the perception of high dynamic scenes. We present a 192 × 2 pixel CMOS SPAD-based LiDAR sensor utilizing this technique and accompanying outdoor measurements showing the capability of it. In this sensor adaptive photon coincidence detection improves the dynamic range of the measureable target reflectance by over 40 dB. © 2018 by the authors. Licensee MDPI, Basel, Switzerland.

Physical attacks are a serious threat for embedded devices. Since these attacks are based on physical interaction, sensing technology is a key aspect in detecting them. For highest security levels devices in need of protection are placed into tamper-resistant enclosures. In this paper we present a capacitive multi-channel security sensor IC in a 350 nm CMOS technology. This IC measures more than 128 capacitive sensor nodes of such an enclosure with an SNR of 94.6 dB across a 16× 16 electrode matrix in just 19.7 ms. The theoretical sensitivity is 35 aF which is practically limited by noise to 460 aF. While this is similar to capacitive touch technology, it outperforms available solutions of this domain with respect to precision and speed. © 2018 IEEE.

In this work the constant current stimulator of a new epiretinal implant is presented. It consists of a digital waveform generator device, which permits to modify the pulse pattern via a programming interface, a digital-to-current converter, which translates the digital waveform into current pulses with adjustable amplitude, and an output driver, which combines the function of an electrode multiplexer and a high voltage current source for driving large resistive loads. For each of those subcircuits the simulated performance and its designed layout is presented. © 2018 IEEE.

A firmware encryption for embedded devices can prevent the firmware from being read out to clone the device to a counterfeited one or to steal the intellectual property of the software developer. Also the integrity is ensured to hinder an attacker from manipulating the firmware to a malicious one. In this work, a cryptographic concept to implement a Secure Boot functionality using the intrinsic properties of a specific hardware device is shown. After describing the Physical Unclonable Function and the cipher used for the implementation, the key generation algorithm is explained. Further, the function of the crypto-module inside the system architecture and the secure boot sequence are described. © 2018 IEEE.

Indirect time-of-flight (TOF) measurement with single-photon avalanche diodes (SPADs) is performed by counting incident photons in several time windows. Since SPADs exhibit dead time not all incident photons can be counted within a given time window. This affects the expected values and, hence, the variance of the distance measurement. For photon detection rates close to the inverse of the dead time, which defines the maximum count rate of a SPAD, the probability of photon detection cannot be assumed constant within the window anymore. In this paper, the effects of the dead time on the photon counts as well as the corresponding variances are analyzed by employing statistical calculations. Based on these a model which can be used to correct systematic error is derived. In addition, the detailed analysis of the variance is useful to estimate the performance of an indirect TOF system in the design phase. © 2004-2012 IEEE.

LiDAR is a key sensor technology for future driving. For autonomous vehicles a fast and reliable three dimensional monitoring of the environment is essential for managing a wide variety of common traffic situations. Since these kinds of systems use typically light in the near infrared range, ambient light of the sun is a serious problem due to its high intensity compared to the laser source. Therefore, reducing the influence of ambient light on the distance measurement is very important. In this paper we present a 2 × 192 pixel SPAD-based direct time-of-flight line sensor for flash LiDAR applications with high ambient light rejection integrated in standard CMOS technology. Two commercially available 905 nm laser diodes emitting short pulses are employed for scene illumination. For time measurement an in-pixel timeto-digital-converter with a resolution of 312.5 ps and full range of 1.28 μs has been implemented. Each pixel uses four vertically arranged single SPADs for background light rejection based on the detection of temporal correlated photons. This technique allows the discrimination of the received laser pulse buried in the superimposed background light and, hence, to improve the measurement quality. Additionally, different parameters of the coincidence detection circuit, such as coincidence depth and time, can be varied during operation to enable a real time adjustment to the present ambient light condition, which is measured between each laser shot by operating the sensor in photon counting mode. By using this technique the sensor allows a reliable distance measurement at various ambient and target conditions. © 2018 SPIE.

In this paper we present a readout circuit for capacitive micro-electro-mechanical system (MEMS) sensors such as accelerometers, gyroscopes or pressure sensors. A flexible interface allows connection of a wide range of types of sensing elements. The ASIC (application-specific integrated circuit) was designed with a focus on ultra-low noise operation and high analog measurement performance. Theoretical considerations on system noise are presented which lead to design requirements affecting the reachable overall measurement performance. Special emphasis is put on the design of the fully differential operational amplifiers, as these have the dominant influence on the achievable overall performance. The measured input referred noise is below 50zF/√Hz within a bandwidth of 10Hz to 10kHz. Four adjustable gain settings allow the adaption to measurement ranges from ±750fF to ±3pF. This ensures compatibility with a wide range of sensor applications. The full input signal bandwidth ranges from 0Hz to more than 50kHz. A high-precision accelerometer system was built from the described ASIC and a high-sensitivity, low-noise sensor MEMS. The design of the MEMS is outlined and the overall system performance, which yields a combined noise floor of 200ng/√Hz, is demonstrated. Finally, we show an application using the ASIC together with a CMOS integrated capacitive pressure sensor, which yields a measurement signal-to-noise ratio (SNR) of more than 100dB.

High ambient illumination reduces the range and target detection reliability in light-based 3D sensors. Raising the optical power of the artificial illumination source to overcome the influence of high ambient light is often not possible for systems with flash illumination due to eye safety constraints. The high timing resolution of single-photon avalanche diodes enables the search for photon concurrences in incident photon streams. In this paper a theoretical analysis of coincidence and its benefits for 3D sensors with single-photon avalanche diodes is presented. © 2017 IEEE.

Indirect time-of-flight measurement with SPADs is performed by counting incident photons in several time windows. Since SPADs exhibit dead time not all incident photons can be counted within a given time window. This affects the expected values and, hence, the variance of the distance measurement. For photon detection rates close to the inverse of the dead time, which defines the maximum count rate of a SPAD, the probability of photon detection cannot be assumed constant within the window anymore. In this paper the effects of dead time on the photon counts are analyzed by employing statistical calculations. Based on these a model to correct such effects can be derived. © 2017 IEEE.

In this work the design of a new epiretinal stimulator approach with integrated bendable imaging sensor is presented. First, the fundamental differences to the existing retinal stimulation implants is described. In the second part, a brief description of the novel designed implant is given, where several integrated circuits are placed on a single polyimide foil to create the mechanically flexible implant. Then the design of the developed dies is presented, containing the image sensor with a signal processing unit, a configurable waveform generator and a current controlled stimulation unit. © 2017 IEEE.

For applications like autonomous driving a fast and reliable monitoring of the vehicle's environment is essential. With the possibility of fabricating single-photon avalanche diodes in standard CMOS processes, small and cost-efficient time-of-flight sensors can be realized. To estimate the performance of such a sensor a general theoretical model taking into account the properties of the light source, the sensor, and the environment is of key importance. In this paper we will present a model to predict the performance parameters like achievable range and precision of different time-of-flight measurement techniques. © 2017 IEEE.

This communication addresses the range accuracy of SPAD-based time-of-flight (TOF) sensors that employ laser pulse modulation. Two basic approaches are considered: Indirect and direct TOF. We investigate confidence intervals and derive formulas for standard errors of the relative distance error for both approaches based on photon statistics. © 2017 IEEE.

With the possibility of fabricating single-photon avalanche diodes in standard CMOS processes, arrays for range imaging applications have been developed. Proper operation in high ambient illumination environments is one of the major issues of scannerless sensors published so far. In this paper a theoretical study of the direct and indirect working principle regarding high ambient illumination is shown. Further, new concepts based on these principles to reduce the sensitivity to ambient light are presented. © 2016 IEEE.

In a top-down design approach sensible decisions about system architecture are hard to make unless one can obtain reasonable predictions about the performance of building blocks such as ADCs or amplifiers. When an extended temperature range up to 300°C is targeted the problem is exacerbated by the large variations in device characteristics over temperature. A fundamental choice to be made is if and where to employ discrete-time (DT) rather than continuous-time (CT) techniques. In making this choice it must be considered whether transistor switches can be implemented well enough to allow the desired precision to be achieved. The Ion/Ioff figure of merit provides a good measure of the quality of transistor switches, in this paper derivations are made which map this figure of merit to a rough prediction about the precision achievable using DT circuitry. It is found that such techniques face significant problems at high temperatures, some possible block-level architectural techniques are suggested which may be able to expand the temperature range in which DT approaches are applicable. © 2016 IEEE.

In recent years, various developments have advanced the field of optical sensors based on single-photon avalanche diodes. In this contribution we present two sensors that were designed in 0.35μm CMOS technology. A silicon photomultiplier achieves a fill factor of 68 % at 50 μm pixel pitch and allows improved functionality by cointegration of application-specific readout electronics. A time-gated line sensor with gating times down to 1.5ns and serial digital output was designed based on optimized pixel geometry suitable for spectroscopy applications. Planned further improvements of sensors based on single-photon avalanche diode technology, including on-chip temperature compensation, are presented. © 2015 IEEE.

Today an increasing number of applications in fields like power electronics or sensor signal conditioning are demanding for integrated circuits supporting an extended temperature range. Mixed signal circuits featuring analog circuitry, analog to digital converters as well as embedded microcontrollers and on-chip memories are requested to operate up to 300°C or even more. This paper outlines technological and design specific challenges as well as limiting factors for integrated circuits at high temperatures realized in a Silicon-on-Insulator (SOI) CMOS technology. The technology and circuit design techniques are presented based on a complex design example. Finally performance parameters of basic building blocks measured up to 300°C are shown. © 2015 IEEE.

Assessing and optimizing the functionality of the various microelectronic components of the powertrain of battery propelled vehicles, is a crucial pre-request to further develop and make sure the electronics could fit well in practical applications. For this purpose, dedicated modeling, simulation and analysis methods have been developed. First parameterizable multi-disciplinary system models, covering among others electrical, digital and magnetic domains, with special emphasis on the description of analog parasitic, are developed. The typical values as well as value ranges for the parameters which affect the system performance are considered. Then the simulations are executed with the application of Experiments Planning method. Statistical and metamodeling strategies are adopted to derive metamodels to visualize, analyze and interpret the simulation results, especially the sensitivity of the system behavior to its parameters. A Battery Management System has been chosen to demonstrate the methods. More specifically, the Active Balancing of a 12-series Lithium-Ion cells battery module is investigated: the sensitivity of the energy transfer to the system and component parameters is derived and representative metamodels are created. © 2015 IEEE.

The analog performance, i.e. intrinsic gain and bandwidth, of SOI (Silicon-on-Insulator) MOSFETs in a wide temperature range up to 400°C has so far been strongly affected by device leakage currents. Thereby the moderate inversion region as a preferred point of operation has been unusable as leakage currents dominate drain currents at high temperatures. In this paper we present a reverse body biasing (RBB) approach to improve the transistor's analog performance up to 400°C. Thereby operation in the lower moderate inversion region of the SOI transistor device is feasible. The method allows beneficial FD (fully depleted) device characteristics in a 1.0 μm PD (partially depleted) SOI CMOS process. NHGATE and PHGATE devices with an H-shaped gate have been investigated. Results report a significant improvement of the g m/Id factor and the intrinsic gain Ai in the moderate inversion region by applying RBB. © 2013 IEEE.

Continuous Time Digital Signal Processing features some interesting improvements with respect to power consumption and signal quality compared to classical Discrete Time Signal Processing Systems. Signals processed in continuous time provide an improved Signal to Noise ratio and the power consumption can be reduced, due to the property that the signal is only processed when an appropriate change in the analog input signal occurs. Therefore this kind of signal processing is interesting for a wide range of applications. However, there are still some critical aspects with respect to the implementation of continuous time systems. In particular the required chip area and the power consumption of CT delay elements proposed up to now is quite large. Therefore in this contribution a new concept for continuous time delay elements will be introduced, which offers considerable improvements with respect to size and power consumption. © 2013 IEEE.

The analog performance, e.g. intrinsic gain and bandwidth, of SOI (Silicon-on-Insulator) MOSFETs is strongly affected by increasing operating temperature. Increased leakage currents and decreased device performance significantly reduce the high temperature capability of analog circuits at high temperatures. In this paper, we demonstrate that the reverse body biasing (RBB) approach improves the transistor's analog performance up to 400°C. With RBB, operation in the lower moderate inversion region of the SOI transistor is feasible at increased temperatures. The method also allows beneficial FD (fully depleted) device characteristics in a 1.0 μm PD (partially depleted) SOI CMOS process. NHGATE and PHGATE devices with an H-shaped gate have been investigated. Results report an improvement of the gm/Id factor and the intrinsic gain Ai in the moderate inversion region by applying RBB. In addition, essential analog building blocks, e.g. current mirrors, an analog switch and a two-stage operational amplifier have been investigated. It is shown that the high temperature operation of these circuits is significantly enhanced when RBB is applied. © 2013 IEEE.

A low-power, area-efficient delay element with a wide tunable delay range is proposed. A novel circuit topology is used, where the delay is set using a single control-voltage that controls both the charging and discharging time of a capacitor. A positive feedback mechanism minimizes and keeps the energy consumption constant for a wide delay range. Figure of merits are presented and comparison with previous works illustrates the improvements obtained. © 2012 IEEE.

Systems which perform digital signal processing in continuous-time are attractive for a number of applications like biomedical implants, hearing aids, remote sensors, telecommunications, and audio and speech processing. A main difference to sampled data systems is the realization of the delay elements which must be implemented as quasi-continuous time delay lines. Thus a large chip area is required for the delay elements which are also a critical point of these systems. Therefore in this paper a method will be presented which allows reducing the implementation costs and power consumption of these elements. This can be achieved by granularity reduction without sacrificing performance. Furthermore implementation aspects for an integrated solution will be covered. © 2011 IEEE.